\doxysubsubsubsection{UART State Code Definition }
\hypertarget{group___u_a_r_t___state___definition}{}\label{group___u_a_r_t___state___definition}\index{UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_gacd81aeb745b71fc1c121cc686369600d}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+RESET}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_ga5f9ebc1c0e62dbad395ecf020e88bce9}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+READY}}~0x00000020U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_gabe7a46b4b59e60aa480bdf2aa4c2fd8e}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY}}~0x00000024U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_gabfe9c686182148f2ecd8527d31576163}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY\+\_\+\+TX}}~0x00000021U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_ga7e0aa32633802a0b89a96df4909ededf}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY\+\_\+\+RX}}~0x00000022U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_ga8668588bb9f40ce6ef0d4174a7144a39}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY\+\_\+\+TX\+\_\+\+RX}}~0x00000023U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_ga8fb45af1ff5413abde026eba4ecf264d}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+TIMEOUT}}~0x000000\+A0U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___state___definition_gacbe168f8945e38c90d622982ee1300aa}{HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+ERROR}}~0x000000\+E0U
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___u_a_r_t___state___definition_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___u_a_r_t___state___definition_gabe7a46b4b59e60aa480bdf2aa4c2fd8e}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_BUSY@{HAL\_UART\_STATE\_BUSY}}
\index{HAL\_UART\_STATE\_BUSY@{HAL\_UART\_STATE\_BUSY}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_BUSY}{HAL\_UART\_STATE\_BUSY}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_gabe7a46b4b59e60aa480bdf2aa4c2fd8e} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY~0x00000024U}

an internal process is ongoing Value is allowed for g\+State only \Hypertarget{group___u_a_r_t___state___definition_ga7e0aa32633802a0b89a96df4909ededf}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_BUSY\_RX@{HAL\_UART\_STATE\_BUSY\_RX}}
\index{HAL\_UART\_STATE\_BUSY\_RX@{HAL\_UART\_STATE\_BUSY\_RX}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_BUSY\_RX}{HAL\_UART\_STATE\_BUSY\_RX}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_ga7e0aa32633802a0b89a96df4909ededf} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY\+\_\+\+RX~0x00000022U}

Data Reception process is ongoing Value is allowed for Rx\+State only \Hypertarget{group___u_a_r_t___state___definition_gabfe9c686182148f2ecd8527d31576163}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_BUSY\_TX@{HAL\_UART\_STATE\_BUSY\_TX}}
\index{HAL\_UART\_STATE\_BUSY\_TX@{HAL\_UART\_STATE\_BUSY\_TX}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_BUSY\_TX}{HAL\_UART\_STATE\_BUSY\_TX}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_gabfe9c686182148f2ecd8527d31576163} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY\+\_\+\+TX~0x00000021U}

Data Transmission process is ongoing Value is allowed for g\+State only \Hypertarget{group___u_a_r_t___state___definition_ga8668588bb9f40ce6ef0d4174a7144a39}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_BUSY\_TX\_RX@{HAL\_UART\_STATE\_BUSY\_TX\_RX}}
\index{HAL\_UART\_STATE\_BUSY\_TX\_RX@{HAL\_UART\_STATE\_BUSY\_TX\_RX}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_BUSY\_TX\_RX}{HAL\_UART\_STATE\_BUSY\_TX\_RX}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_ga8668588bb9f40ce6ef0d4174a7144a39} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+BUSY\+\_\+\+TX\+\_\+\+RX~0x00000023U}

Data Transmission and Reception process is ongoing Not to be used for neither g\+State nor Rx\+State.\+Value is result of combination (Or) between g\+State and Rx\+State values \Hypertarget{group___u_a_r_t___state___definition_gacbe168f8945e38c90d622982ee1300aa}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_ERROR@{HAL\_UART\_STATE\_ERROR}}
\index{HAL\_UART\_STATE\_ERROR@{HAL\_UART\_STATE\_ERROR}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_ERROR}{HAL\_UART\_STATE\_ERROR}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_gacbe168f8945e38c90d622982ee1300aa} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+ERROR~0x000000\+E0U}

Error Value is allowed for g\+State only \Hypertarget{group___u_a_r_t___state___definition_ga5f9ebc1c0e62dbad395ecf020e88bce9}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_READY@{HAL\_UART\_STATE\_READY}}
\index{HAL\_UART\_STATE\_READY@{HAL\_UART\_STATE\_READY}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_READY}{HAL\_UART\_STATE\_READY}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_ga5f9ebc1c0e62dbad395ecf020e88bce9} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+READY~0x00000020U}

Peripheral Initialized and ready for use Value is allowed for g\+State and Rx\+State \Hypertarget{group___u_a_r_t___state___definition_gacd81aeb745b71fc1c121cc686369600d}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_RESET@{HAL\_UART\_STATE\_RESET}}
\index{HAL\_UART\_STATE\_RESET@{HAL\_UART\_STATE\_RESET}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_RESET}{HAL\_UART\_STATE\_RESET}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_gacd81aeb745b71fc1c121cc686369600d} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+RESET~0x00000000U}

Peripheral is not initialized Value is allowed for g\+State and Rx\+State \Hypertarget{group___u_a_r_t___state___definition_ga8fb45af1ff5413abde026eba4ecf264d}\index{UART State Code Definition@{UART State Code Definition}!HAL\_UART\_STATE\_TIMEOUT@{HAL\_UART\_STATE\_TIMEOUT}}
\index{HAL\_UART\_STATE\_TIMEOUT@{HAL\_UART\_STATE\_TIMEOUT}!UART State Code Definition@{UART State Code Definition}}
\doxysubsubsubsubsubsection{\texorpdfstring{HAL\_UART\_STATE\_TIMEOUT}{HAL\_UART\_STATE\_TIMEOUT}}
{\footnotesize\ttfamily \label{group___u_a_r_t___state___definition_ga8fb45af1ff5413abde026eba4ecf264d} 
\#define HAL\+\_\+\+UART\+\_\+\+STATE\+\_\+\+TIMEOUT~0x000000\+A0U}

Timeout state Value is allowed for g\+State only 